Vishwanathan Iyer

Vishwanathan Iyer

System Software Validation Engineer
vsiyer91@gmail.com | linkedin.com/in/vishwanathan-iyer

Professional Summary

Results-driven System Software Validation Engineer with over a decade of experience ensuring the quality and stability of high-volume silicon products for industry leaders like Intel. Expert in full-lifecycle system validation, from pre-silicon to post-launch, with a proven track record of leveraging automation to solve complex integration challenges and deliver world-class products like the Intel Core Ultra Series.

  • Proven Impact: Shipped three generations of high-volume Graphics IPs by leading validation efforts, directly contributing to the launch of market-leading products.
  • Automation Expert: Architected and deployed a multimedia automation framework that executed 18,000+ tests, identifying ~1000 unique defects and significantly enhancing product quality.
  • Recognized Excellence: Received over 40 stakeholder recognitions for exceptional contributions to system validation and problem-solving.
    View Notable Awards
      Year Category Description
      2022 SIV Superstar Cost savings and optimizations.
      2021 SIV Change Agent oneMAP idea to production.
      2021 SIV Superstar Multimedia Automation deployment.
      2020 WSS DRA Distributed, Multi-site Power-on.
      2020 SIV Special Award Windows 10x validation strategy for dual screens.
      2020 WSS recognition Stability debug and Engineering Excellence.

Experience

System Software Validation Engineer
Intel Corporation July 2017 - Present
  • Led the end-to-end validation for three generations of Graphics IPs, ensuring the successful, on-time launch of high-volume products like the Intel Core Ultra Series 2.
  • Architected a Python-based automation framework that reduced manual testing efforts by 50%, executing 18,000+ test runs to identify and enable the fix of ~1000 defects pre-launch.
  • Drove the successful release of production-quality software stacks to OEMs by serving as the primary validation stakeholder for key accounts.
  • Improved system stability through the implementation of novel stress and stability test methodologies for multimedia drivers.
Sr. Project Technical Assistant
I.I.T. Bombay July 2013 - July 2017
  • Engineered and developed multiple embedded systems projects, including a novel urban agriculture monitoring system, from concept to deployment.
  • Designed and implemented lab experiments for the Embedded and Real-time Systems curriculum, enhancing the learning experience for over 200 students.
  • Managed lab resources and provided technical guidance for the national-level e-Yantra Robotics Competition.

Technical Skills

Validation & Debugging

  • Silicon Validation & Bring-up
  • System Integration & Triage
  • Windows Internals & WinDbg
  • Performance & Stability Testing

Programming & Automation

  • Python (Advanced)
  • C / Embedded C
  • Git & CI/CD Pipelines
  • Test Automation Frameworks

Hardware & Protocols

  • DisplayPort 2.1 & HDMI 2.1
  • I2C, SPI, USB Protocols
  • DirectX, Vulkan, & Graphics APIs
  • Embedded Systems Design

Education

M-Tech, Electronic Systems
I.I.T. Bombay CPI: 9.21 / 10
B.E., Electronics
V.E.S.I.T. Percentage: 75.50%

Professional Development

  • Publications: Authored and co-authored 8 papers and posters for internal Intel conferences.
    View Full List
    1. D. Ambarish and V. Iyer. Usb audio offload end to end on pre-silicon platform (lakefield). SWPC, 2018.
    2. R. Angadimani, V. Iyer, S. S, and P. Koduru. Unified automation methodology to monitor functional and pnp metrics for use case validation. DTTC, 2021.
    3. V. Iyer, R. Angadimani, and F. Fathima. One modular automation for platform (onemap). DTTC, 2022.
    4. V. Iyer, S. Bhat, and S. Banik. Triage assistant: Algorithm to classify defects to its signature and assist trage. SWPC, 2022.
    5. V. Iyer, S. Lawerence, R. Angadimani, and D. KV. Windows sw debug using machine learning. Platform Analysis and Technology Summit, 2018.
    6. V. Iyer and P. K. P. Graphics driver end to end validation on pre-silicon. Intel Pre-Silicon Software Readiness Summit, 2018.
    7. V. Iyer, P. K. P, R. Angadimani, and A. Das. Multimedia pre-silicon software: A platform level retrospective. DTTC, 2019.
    8. V. Iyer and R. P. The next wave of personal computing: Dual display. SWPC, 2020.
  • Certifications: Oracle Cloud GenAI Professional, Advanced Generative AI, AI Everywhere, Python for CS (6.00.1x), C for Embedded Applications.
    View Links
    1. Oracle Cloud GenAI Professional
    2. Advanced Generative AI
    3. AI Everywhere
    4. Python for CS (6.00.1x)